MLAB



Category clock

Status
CLKGEN01B

CLKGEN01B

Single output I2C programmable clock generator.

CLKHUB02A

CLKHUB02A

high speed clock distributor with ten LVPECL outputs. Usable up to 3.5GHz

CLKDIV01A

CLKDIV01A

Multiple division ratios can be selected by jumpers. Possible division ratios are: (÷1, ÷2, ÷4, ÷8) or (÷2, ÷4, ÷8, ÷16) every output is synchronous each other. The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state.

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