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PCRD06

Sample and hold circuit for photomultiplier pulse signal processig

This is an open-source hardware design, one of the modules from the MLAB labolatory system.

PCRD06A Sample and hold circuit with analog memory

Signal follower with analog memory. It is a circuit equivalent to a sample-hold circuit triggered by a falling edge of signal or a circuit equivalent to a peak detector. The PCRD06A module is normally used in combination with SiPM based scintillation detector.

Examples of detectors that could be connected to the PCRD analog-backend.

PCRD06A

PCRD06A

Basic usage

The circuit is able to operate in multiple modes. The operation mode depends on the logic used to control the circuit.

  1. The first operation mode is the peak detector, which stores the maximal value of peak output from SiPM. This mode holds the maximal value of pulse until the circuit is reset (usually after AD conversion)
  2. Pulse discriminator, where the AD converted value is compared with a predefined threshold. After passing this threshold the circuit should be reset.
  3. The energy integrator in that mode signal is ADconverted as fast as possible, and the dose is integrated numerically over the specified time interval.

Principle of function

The signal output from the scintillation detector is a pulse. The pulses are stored in a specially developed sample-hold circuit that behaves as a signal follower and analog memory. When signal #PeakDetect_Trace is in H an analog switch U5 turns on and a signal at an output U2 follows a signal at the input with a slight delay which is done by R13 and C19. If signal #PeakDetect_Trace is switched to a high impedance state the analog switch U5 starts to be controlled by a comparator U1. In this case, when the input signal goes from high to low, a positive input of the comparator will be at a higher voltage than a negative input, following a voltage at capacitor C19.

PCRD06A

It causes the switching-off of the analog switch U5 and the capacitor C19 holds its last voltage value. This behavior is similar to a peak detector circuit. In the next step, the stored voltage can be converted by ADC connected at the output and after this conversion, the input #PeakDetect_Trace goes again to H and the circuit changes behavior to signal follower circuit. The described sample-hold circuit does not suffer from typical peak detector circuit ills like insensitivity to small signals, mistreatment of negative signals, or discharging the capacitor by leakage current through diodes.

Moreover, this circuit can be used as a pulse discriminator as well. The signal #PeakDetect_Trace can be connected to an input of digital circuits when it is controlled by the comparator U1. When the input signal goes from high to low, the signal #PeakDetect_Trace goes from high to low as well. This behavior can be used for the detection of the falling edge of the signal. There is only one constraint of this circuit, the input signal can not change raising/falling time widely and the RC time constant (R13, C19) must be chosen correctly, respecting the input signal time properties.

More details about the principle are in DOCTORAL THESIS, Research on cosmic rays on board aircraft using a newly developed PIN diode detector, 2020, CTU in Prague

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